1. Field of the Invention
The present invention relates to a transceiver and more specifically to a method and apparatus of testing a receiver of an analog front end of a communication system transceiver.
2. Background Art
A communication device including a transmitter and a receiver is known as a transceiver. In many transceivers, the receiver consists of an analog front end (AFE) followed by digital processing. Examples of such transceivers are 1000BaseT Gigabit Ethernet transceivers and 100BaseTX Fast Ethernet transceivers. The AFE generally includes an analog to digital converter (ADC) and a programmable gain amplifier (PGA) and typically performs functions which include analog to digital conversion, filtering, gain control, hybrid summation, and common mode rejection.
Under normal operating conditions, a transceiver is susceptible to various distortions of the received signal caused by both internal and external sources. Therefore, it is useful to test the characteristics of the transceiver in its ability to perform properly under these conditions. Conventional methods of testing transceivers, however, during production and under operation, do not accurately determine the performance or stress the receive path of the transceiver.
The received signal of the transceiver may be susceptible to noise and distortion produced by the internal components of the transceiver and by the channel. For example, in a system that transmits bidrectionally over a channel, the transmitter of the transceiver may introduce a large echo into the received signal. In such a situation, a hybrid is typically performed to subtract a replica of the transmitted signal from the received signal. Furthermore, the ADC in the AFE may produce distortions in the digitized received signal due to the internal non-idealities and the jitter of the clock used to sample the received signal. The received signal may be further distorted by digital processing performed outside the AFE to equalize and detect the received signal. Finite word length effects and adaptation noise in the digital processing may further add noise to the received signal.
In addition to the distortions caused by the internal components of the transceiver, distortions may be produced by external sources. For example, the received signal may be significantly attenuated by traveling through a long channel or crosstalk from a different transmitter may be introduced into the received signal.
Conventional methods of testing the receiver of the transceiver during production involves generating various sine waves of different frequency and amplitude and applying it to the receiver of the transceiver at different settings of the PGA. A high quality (low distortion) signal source is used to generate the sine waves and pins are allocated to the ADC chip to allow an external device to monitor the digital code words generated by the ADC. The data obtained from this process is post processed to obtain receive path performance metrics for each PGA gain setting such as ENOB (effective number of bits). These metrics are compared against thresholds to pass or fail the AFE.
The thresholds are derived by generating models of noise and distortion in the receive path and by applying the models to system simulations to determine whether acceptable bit error rate performance of the transceiver result. Standard metrics of ADC performance such as ENOB, SNR, THD, INL, and DNL are used to control the modeled levels of noise and distortion.
Actual experience testing gigabit Ethernet transceivers using the conventional methods of testing has shown that in some cases, there is only a weak correlation between the derived thresholds and the actual bit error rate and SNR performance of the receiver. The discrepancy can be due to several factors. First, it can be difficult to generate models that accurately reflect the performance of the receive path. Another factor is that the sine wave testing is not performed under normal operating conditions for the transceiver and much of the processing and functions of the components of the transceiver and components interfacing the transceiver are inactive during the test. Hence, the noise that would be normally caused by these functions are not present during the test. Additionally, sine waves are not representative of the complex waveforms received during the normal operation of a transceiver and therefore may not stress the transceiver in the ways a complex receive waveform may.
Conventional production testing of gigabit Ethernet components tests the transceiver in an operational mode by first connecting the transceiver's transmitters back to its own receivers and then sending one or more data packets through the transceiver and monitoring if the data packets have been received without error. Though the chip is used in an operational mode, the receive path is not stressed by the conventional test since the transmitter applies only a full amplitude signal to the receiver and the receiver is operating at its maximum SNR. The conventional test does not take into account that in a real environment, the signal received by the remote transmitter may be significantly attenuated by traveling through a long channel. Furthermore, the conventional test exercises the receive path for only a small subset of the available range of the PGA.
What is needed is a method or apparatus of testing the receiver of the transceiver under an operational mode where the receiver of the transceiver is loaded close to its full dynamic range over a range of PGA gain settings.